1. Field of Invention
This invention relates to a method and apparatus for fabricating semiconductor device packages, more particularly, to attaching a thermally conductive stiffener proximate to a face of the semiconductor device for reducing warpage of the semiconductor package, and for improved thermal transfer of heat from the semiconductor device in the package.
2. Discussion of the Related Art
Packaging techniques for integrated circuits have been developed in an attempt to satisfy demands for miniaturization in the semiconductor industry. Improved methods for miniaturization of integrated circuits enabling the integration of millions of transistor circuit elements onto a single integrated circuit semiconductor die, have resulted in increased emphasis on methods to package the semiconductor die in a reliable and mass producible package.
Two related types of integrated circuit packages are the plastic pin grid array ("PPGA") and the plastic ball grid array ("PBGA"). The PPGA and PBGA packages are particularly adapted to have a large number of external connections through either metal pins or solder balls, respectively. The PPGA and PBGA packages are fabricated from printed wiring boards ("PWB") that may have one or more layers of conductive traces or leads arranged in patterns that facilitate interconnection of the semiconductor die circuit connection pads to the external connection pins or solder balls. PPGA and PBGA packages are more fully illustrated in commonly owned U.S. Pat. No. 5,357,672, by Newman, issued Oct. 25, 1994; and U.S. patent application Ser. No. 08/142,251, by Barber, filed Oct. 22, 1993, both incorporated by reference herein for all purposes.
The semiconductor die is placed onto a face of the PWB and connections, for example wirebonds, are made between the die connection pads and the conductive traces of the PWB. A dam ring is typically placed around the semiconductor die, and encapsulation material, for example "HYSOL" (trademark of Dexter Electronics, Inc.), in its uncured liquid state is poured over the semiconductor die and connections within the dam ring. The encapsulation material is cured, and an aluminum or other type of metal lid is placed over the cured encapsulation and dam ring to form a cover and flat surface.
The flat surfaced lid is necessary for the package to be compatible with the pick and place automatic insertion equipment that is used to assemble integrated circuit packages onto electronic system printed circuit boards. In addition, the metal lid provides thermal heat transfer from the active circuit heat generating semiconductor die to the air surrounding the package or to a heat sink attached to the lid.
A sufficient volume and quantity of encapsulation material poured onto the PWB must be used to fully cover the bond wires, semiconductor die, and to occupy the space between the dam ring and under the lid. The encapsulation material while curing, however, tends to shrink. This curing shrinkage, because of the amount of encapsulation material on the PWB, may cause the PWB to warp excessively. Excessive warpage of the PWB renders the package difficult or unfit for assembly, especially for automatic assembly with a planar system printed circuit board.
What is needed is a method and system for fabricating simple and inexpensive integrated circuit packages with a minimum amount of encapsulation material necessary, and with a flat outer surface compatible with automated pick and place assembly equipment.